How Does the ECM Shut Itself Off?
Thread Starter
Race Director
Joined: Apr 2002
Posts: 10,036
Likes: 346
From: Anaheim CA
How Does the ECM Shut Itself Off?
I'm working with a 1227165 and BUA firmware.
The ECM wakes up from standby mode when you turn on the ignition.
I'm trying to figure out how it shuts down when you turn the key off. It obviously doesn't go into standby immediately because it does an IAC reset and MAF burnoff before it goes into standby. This tells me that the shutdown is controlled by the firmware.
Looking at the schematic, on page 6 is U1, which is a combination of voltage regulator, reset controller and power sequencer. It has three voltage regulated outputs:
VCC, which powers most of the chips in the ECM
VCC#, which is the reference voltage for the TPS, etc.
VCCSTANDBY, which is the "keep alive" voltage for the RAM.
How does U1 know it's time to turn off VCC & VCC#? It appears to be controlled by the ~LIMP signal on pin 15, labeled POWEROFF. This signal comes from U12, pin 20. It's shown in multiple places in the schematic, but seems to be most accurately represented on page 1.
I see two possible scenarios (maybe there are more):
1 - The code stops sending the COP 2 watchdog reset to U12, causing it to time out and send out the ~LIMP signal. I think this is the most likely.
2 - There is a bit in the FMD Control byte that controls ~LIMP. They are:
b7: 1 = read status byte 2, 0 = read status byte 1
b6: ???
b5: ???
b4: ???
b3: ???
b2: 1 = BYPASS# high - EST enabled, 0 = EST disabled
b1: COP 2
b0: 1 = 348 ohm coolant table, 0 = 3998 ohm coolant table
I haven't seen any references in the code to the mystery bits, so this is unlikely.
I would appreciate any help anyone can give me with this. "How does it know?"
The ECM wakes up from standby mode when you turn on the ignition.
I'm trying to figure out how it shuts down when you turn the key off. It obviously doesn't go into standby immediately because it does an IAC reset and MAF burnoff before it goes into standby. This tells me that the shutdown is controlled by the firmware.
Looking at the schematic, on page 6 is U1, which is a combination of voltage regulator, reset controller and power sequencer. It has three voltage regulated outputs:
VCC, which powers most of the chips in the ECM
VCC#, which is the reference voltage for the TPS, etc.
VCCSTANDBY, which is the "keep alive" voltage for the RAM.
How does U1 know it's time to turn off VCC & VCC#? It appears to be controlled by the ~LIMP signal on pin 15, labeled POWEROFF. This signal comes from U12, pin 20. It's shown in multiple places in the schematic, but seems to be most accurately represented on page 1.
I see two possible scenarios (maybe there are more):
1 - The code stops sending the COP 2 watchdog reset to U12, causing it to time out and send out the ~LIMP signal. I think this is the most likely.
2 - There is a bit in the FMD Control byte that controls ~LIMP. They are:
b7: 1 = read status byte 2, 0 = read status byte 1
b6: ???
b5: ???
b4: ???
b3: ???
b2: 1 = BYPASS# high - EST enabled, 0 = EST disabled
b1: COP 2
b0: 1 = 348 ohm coolant table, 0 = 3998 ohm coolant table
I haven't seen any references in the code to the mystery bits, so this is unlikely.
I would appreciate any help anyone can give me with this. "How does it know?"
Last edited by Cliff Harris; Aug 31, 2011 at 03:55 AM.
Thread Starter
Race Director
Joined: Apr 2002
Posts: 10,036
Likes: 346
From: Anaheim CA
To answer my own question...
U12 monitors ignition voltage. When it sees the voltage go away it waits about 10 seconds to allow for MAF burnoff and TPS reset. Then it sends the ~LIMP signal to U1, which turns off VCC and VCC#, leaving only VCCSTANDBY, which keeps the RAM alive to maintain the BLMs and historical error codes.
U12 monitors ignition voltage. When it sees the voltage go away it waits about 10 seconds to allow for MAF burnoff and TPS reset. Then it sends the ~LIMP signal to U1, which turns off VCC and VCC#, leaving only VCCSTANDBY, which keeps the RAM alive to maintain the BLMs and historical error codes.
